FIG. 5 is a cross-sectional view showing a multilayer interconnection utilizing insulating films of a prior art semiconductor integrated circuit. In FIG. 5, reference numeral 100 designates a semiconductor substrate. A first insulating film 101 is disposed on the substrate 100 and a lower wiring 102 is disposed on the first insulating film 101. A second insulating film 103 is disposed on the first insulating film 101 and the lower wiring 102. An upper wiring 104 is disposed on the second insulating film 103.
A method of making the structure of FIG. 5 is illustrated in FIGS. 7(a)-7(d). Initially, as shown in FIG. 7(a), the first insulating film 101 is disposited on a surface of the substrate 100 on which a semiconductor element is present. Preferably, the insulating film 101 is deposited by chemical vapor deposition (CVD). Then, a contact hole (not shown) is formed through the first insulating film 101 to connect the semiconductor element on the substrate to the lower wiring. Then, a metal film is deposited on the insulating film 101 by vapor deposition or the like and patterned as shown in FIG. 7(b), resulting in the lower wiring 102. Thereafter, as shown in FIG. 7(c), the second insulating film 103 is deposited on the entire surface of the wafer to bury the lower wiring 102. Preferably, the insulating film 103 is deposited by CVD. Then, a contact hole (not shown) is formed through the second insulating film 103 to connect the upper wiring to the lower wiring or the semiconductor element on the substrate. Then, as shown in FIG. 7(d), a metal film is deposited on the insulating film 103 by vapor deposition or the like and patterned to form the upper wiring 104.
In this structure, the first insulating film 101 electrically separates the substrate 100 from the lower wiring 102 and the second insulating film 103 electrically separates the lower wiring 102 from the upper wiring 104.
FIG. 6 is a cross-sectional view showing an air-bridge interconnection of a prior art semiconductor integrated circuit. In FIG. 6, an upper wiring 201 is supported by pillars 202 and disposed on the substrate 200. Reference numeral 203 designates air gaps between the substrate 200 and the upper wiring 201.
A method of making the structure of FIG. 6 is illustrated in FIGS. 8(a)-8(d). Initially, as shown in FIG. 8(a), a photoresist 204 is deposited on the surface of the substrate 200 on which a semiconductor element is present. Then, as shown in FIG. 8(b), the photoresist 204 is patterned to form apertures 205 at positions where the pillars of the upper wiring are to be formed. Then, as shown in FIG. 8(c), a metal film 206 is deposited on the entire surface of the wafer by vapor deposition or the like and patterned to form the upper wiring 201 and the support-pillars 202. Thereafter, as shown in FIG. 8(d), the photoresist 204 is removed to form air gaps 203 between the upper wiring 201 and the substrate 200.
In the structure of FIG. 6, the air gaps 203 electrically separate the substrate 200 or a lower wiring (not shown) from the upper wiring 201.
In the semiconductor integrated circuit including the multilayer interconnection shown in FIG. 5, the interlayer insulating film has a dielectric constant of its own and the dielectric constant is usually larger than the dielectric constant of air, no matter whether the insulating film is organic or inorganic. In this case, the capacitance between the upper and lower wirings 102 and 104 shown in FIG. 5 and the capacitance between adjacent wirings 102 and 102' shown in FIG. 9 are larger than those in the case where the wirings are separated by air. Therefore, the operating speed of the circuit is determined by the capacitance between the wirings, which makes an increase in the operating speed difficult.
In the air-bridge structure of FIG. 6, the pillars 202 supporting the upper wiring 201 are required to form the air gaps 203 between the upper wiring and a lower wiring (not shown). In case of multilayer interconnection, the pillars should be electrically separated from lower wirings except for an uppermost wiring, so that the interconnection structure is complicated, resulting in difficulty in the production process.